When FPGAs exchange information with the outside world, it is essential to have recognized standards for both sending and receiving information to ensure its correctness. In digital circuits, we commonly use voltage levels to represent "0" and "1." So, what voltage level is considered "1"? At this point, a standard is needed, which is the level standard.
1 Common Level Standards#
1.1 TTL#
TTL (Transistor - Transistor Logic) is a veteran member of the level standards. It was widely used in early digital circuits, but it has some drawbacks, such as a large voltage gap between the high-level decision threshold and the supply voltage, which can lead to signal instability; moreover, the 5 V voltage consumes too much power.
1.2 LVTTL#
LVTTL (Low Voltage Transistor - Transistor Logic) improves upon the shortcomings of TTL by changing the supply voltage to $3.3V$, which also reduces power consumption and enhances signal stability.
1.3 CMOS#
CMOS (Complementary Metal Oxide Semiconductor) is characterized by low power consumption and can automatically adjust power consumption based on the circuit's operating state.
1.4 LVCMOS#
LVCMOS (Low Voltage Complementary Metal Oxide Semiconductor) further reduces the supply voltage and power consumption based on CMOS. LVCMOS is very popular in low-power, medium-low-speed digital circuits.
1.5 LVDS#
LVDS, which stands for Low Voltage Differential Signaling, is a level standard that uses low-voltage differential signaling to transmit high-speed signals, characterized by low voltage, low power consumption, and strong noise suppression capabilities. The output voltage swing of LVDS is very small, only $\pm 350mV$, with a current of about $3.5mA$. Due to its ultra-low power consumption and ultra-fast data transmission rate, it is commonly used for high-speed data transmission.